FPGA Implementation of JPEG and JPEG2000-Based Dynamic Partial Reconfiguration on SOC for Remote Sensing Satellite On-Board Processing

A. Chekini؛ H. R. Naji

دوره 7، شماره 1 ، فروردین 1393، ، صفحه 57-66

چکیده
  This paper presents the design procedure and implementation results of a proposed hardware which performs different satellite Image compressions using FPGA Xilinx board. First, the method is described and then VHDL code is written and synthesized by ISE software of Xilinx Company. The results show that it is easy and useful to design, develop and implement the hardware image compressor using new techniques of programmable logic tools for space applications. In this paper the proposed hardware uses the proposed hardware, and it is put on board of satellite. Appropriate bit streams are produced by ...  بیشتر