FPGA Implementation of JPEG and JPEG2000-Based Dynamic Partial Reconfiguration on SOC for Remote Sensing Satellite On-Board Processing

A. Chekini; H. R. Naji

Volume 7, Issue 1 , April 2014, , Pages 57-66

Abstract
  This paper presents the design procedure and implementation results of a proposed hardware which performs different satellite Image compressions using FPGA Xilinx board. First, the method is described and then VHDL code is written and synthesized by ISE software of Xilinx Company. The results show that ...  Read More

An Algorithm for Increasing Performance of a Space Launch Vehicle Using Solid Rocket Boosters

M. Nosratolahi; V. Blochestani; A. H. Adami-Dehkordi

Volume 2, Issue 1 , April 2009, , Pages 67-71

Abstract
  This article generates the algorithm for increasing performance of a space launch vehicle using solid rocket boosters.In all of the world, many space launch vehicles are designed with limited performance capabilities. But when the increased performance capabilities is required, one of the best solution ...  Read More